SVISS: Symbolic Verification of Symmetric Systems

نویسندگان

  • Thomas Wahl
  • Nicolas Blanc
  • E. Allen Emerson
چکیده

Sviss is a flexible platform for incorporating efficient symmetry reduction into symbolic model checking. The tool comes with an extensive C++ library for system modeling using BDDs and a rich CTLbased model checking engine. Applications range from communication protocols to computer hardware and multi-threaded software. We believe Sviss to be the first symbolic tool to exploit symmetry in concurrent device-driver verification, which is vital in operating system design.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Symbolic Techniques for Performance Analysis of Timed Systems Based on Average Time Separation of Events

[26] A V. D. Ploeg, " Preconditioning techniques for large sparse, non-symmetric matrices with arbitrary sparsity patterns, " In Acknowledgments We would like to thank the reviewers for their valuable suggestions for improving this paper. We would also like to thank V. Vakilotojar at the University of Southern Califor-nia for many insightful discussions and comments related to this work. Algebr...

متن کامل

Scalable Hardware Verification with Symbolic Simulation

programming 8-bit pic microcontrollers in c with interactive hardware simulation PDF pro scalable net 20 application designs PDF pro scalable net 20 application designs experts voice in net PDF scalable voip mobility integration and deployment PDF vblock solution for a virtualized scalable 50000 user PDF simulation of industrial systems discrete event simulation using excelvba resource manageme...

متن کامل

Towards more Dependable Verification of Mixed-Signal Systems

The verification of complex mixed-signal systems is a challenge, especially considering the impact of parameter variations. Besides the established approaches like Monte-Carlo or Corner-Case simulation, a novel semi-symbolic approach emerged in recent years. In this approach, parameter variations and tolerances are maintained as symbolic ranges during numerical simulation runs by using affine a...

متن کامل

Verifying concurrent systems with symbolic execution: temporal reasoning is symbolic execution with a little induction

Symbolic execution is an intuitive strategy to verify sequential programs, which can be automated to a large extent. We have successfully carried over this method of proof to the interactive verification of concurrent systems. The resulting strategy can be applied to the verification of complex parallel programs and arbitrary (linear) temporal formulas. Our underlying logic is defined such that...

متن کامل

Interactive Verification of Concurrent Systems using Symbolic Execution

This paper presents an interactive proof method for the verification of temporal properties of concurrent systems based on symbolic execution. Symbolic execution is a well known and very intuitive strategy for the verification of sequential programs. We have carried over this approach to the interactive verification of arbitrary linear temporal logic properties of (infinite state) parallel prog...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2008